1. Field of Disclosure
This disclosure relates to magnetic tunnel junction (MTJ) devices and methods of integration and fabrication thereof.
2. Background
MTJ elements can be used to create magnetoresistive random access memory (MRAM). Each memory cell (e.g., MRAM) includes an MTJ unit whose resistance can be adjusted to represent a logic state “0” or “1.” Unlike conventional RAM data that is stored by electric charge or current flow, MRAM data is stored by magnetic storage elements. The elements may be formed from two ferromagnetic plates, each of which can hold a magnetic moment, separated by a thin insulating layer, which together form an MTJ. One of the two plates is pinned by an anti-ferromagnetic layer (hereinafter “fixed layer”) set to a particular polarity; the polarization of the other plate (hereinafter “free layer”) will change magnetic moment orientation by a certain direction current or to match that of a sufficiently strong external field.
Reading the polarization state of an MRAM cell is accomplished by measuring the electrical resistance of the cell's MTJ. A particular cell may be conventionally selected by powering an associated transistor, which switches current from a bit line through the MTJ to a source line or verse vice. Due to the tunneling magnetoresistance effect, the electrical resistance of the cell changes due to the relative moment orientation of the polarizations in the two magnetic layers of the MTJ. By measuring the resulting current, the resistance inside any particular cell can be determined, and, from this, the polarity of the free layer can be determined. If the two layers have the same polarization, this is typically considered to mean State “0,” and the resistance is “low.” while if the two layers are of opposite polarization the resistance will be higher and this is typically considered to mean State “1.”
Data may be written to the cells using a variety of schemes. In conventional MRAM, an external magnetic field is provided by current in a wire in proximity to the cell, which is strong enough to align the free layer.
Alternatively, spin-transfer-torque (STT) MRAM uses spin-aligned or polarized electrons to directly torque and flip the magnetic moment of the free layer. The current to write to an STT-MRAM cell is less than the write current for conventional MRAM. Furthermore, no external magnetic field is required, so that adjacent cells are substantially unaffected by stray fields. Thus, write current further decreases as the memory cell size scales down.
One drawback of the MRAM cell structure is that undesired short circuits can occur when forming a contact on the top electrode. As integrated circuits continue to scale down, this increases the susceptibility of the MRAM cell structure to short circuits. Such short circuits may cause the MRAM cell structures to fail. Conventional techniques of increasing the MTJ top cap layer thickness or sandwiching the top structure are aimed at alleviating this issue, but are limited by logic technology. Other drawbacks are associated with conventional MRAM cell structures as well. For example. MTJ patterning and sidewall damage may pose an increasing challenge as MTJ size continues to scale down. Thus, what is needed is an improved MRAM cell structure that reduces or avoids one or more of these drawbacks.